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                                CS-450: Fall 1995
                      Introduction to Computer Architecture
Homework Assignment #2                                     Due Date: 10/05/1995
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1. An analog to digital (A-D) converter is built so as to provide the 
   position of a shaft in a 4-bit excess-3 Gray Code. The output from this 
   A-D converter (i.e. the excess-3 Gray Code of the shaft position) is to
   be converted to a 4-bit binary integer. Design a minimal logic circuit 
   that will accomplish this function.

2. You are given a bunch of 4-to-1 1-bit line multiplexers with an 
   enable input. Show how you could use these to build a 16-to-1 4-bit
   line multiplexer. 

3. As part of the ALU of a special purpose processor, you are asked to build
   a special 8-bit register with the following operation specification. 

    --------------------------------------------------------------
   | Function Code | Action taken at the next clock cycle         |
    --------------------------------------------------------------
   |     0 0       | Do not change the contents of the register   |
   |     0 1       | Compute the 1's complement of the register   |
   |     1 0       | Do a right circular shift of the register    |
   |     1 1       | Load all bits of the register in parallel    |
    --------------------------------------------------------------

   Show the design of this register, assuming the availability of D
   flip-flops, and basic building blocks (e.g. gates, multiplexers, etc.)

4. Prove that if the carry into the sign bit of the sum of two numbers
   is different from the carry out of that bit, then an overflow
   condition exists. Assume 2's complement representation of negative
   numbers. [Hint: You need to show that the above condition occurs
   only when the absolute value of the sum is larger than N = 2**n,
   where n is the number of bits in the register holding the sum].  

5. A 36-bit floating-point binary number has nine bits for the
   exponent, 26 bits for the mantissa, and 1 bit for the sign (of the
   mantissa). The exponent is represented as an integer using the 2's
   complement to represent negative numbers. The mantissa is
   normalized. What is the smallest and largest numbers that could be
   represented in such a bit format? Assume that the hidden bit
   concept explained in class is utilized. Show the representation 
   of 46.3 in that floating-point format. 

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