case 0x00:
  /* 0x00 IMPL BRK */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_BRK();
  break;
case 0x01:
  /* 0x01 XIND ORA */
  inst_am_xind();
  pc += AM_XIND_BYTES;
  machine_pc_set(pc);
  rc = inst_ORA();
  break;
case 0x02:
  /* 0x02 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x03:
  /* 0x03 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x04:
  /* 0x04 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x05:
  /* 0x05 ZP ORA */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_ORA();
  break;
case 0x06:
  /* 0x06 ZP ASL */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_ASL();
  break;
case 0x07:
  /* 0x07 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x08:
  /* 0x08 IMPL PHP */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_PHP();
  break;
case 0x09:
  /* 0x09 IMM ORA */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_ORA();
  break;
case 0x0a:
  /* 0x0a ACC ASL */
  inst_am_acc();
  pc += AM_ACC_BYTES;
  machine_pc_set(pc);
  rc = inst_ASL();
  break;
case 0x0b:
  /* 0x0b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x0c:
  /* 0x0c INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x0d:
  /* 0x0d ABS ORA */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_ORA();
  break;
case 0x0e:
  /* 0x0e ABS ASL */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_ASL();
  break;
case 0x0f:
  /* 0x0f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x10:
  /* 0x10 REL BPL */
  inst_am_rel();
  pc += AM_REL_BYTES;
  machine_pc_set(pc);
  rc = inst_BPL();
  break;
case 0x11:
  /* 0x11 INDY ORA */
  inst_am_indy();
  pc += AM_INDY_BYTES;
  machine_pc_set(pc);
  rc = inst_ORA();
  break;
case 0x12:
  /* 0x12 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x13:
  /* 0x13 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x14:
  /* 0x14 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x15:
  /* 0x15 ZPX ORA */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_ORA();
  break;
case 0x16:
  /* 0x16 ZPX ASL */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_ASL();
  break;
case 0x17:
  /* 0x17 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x18:
  /* 0x18 IMPL CLC */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_CLC();
  break;
case 0x19:
  /* 0x19 ABSY ORA */
  inst_am_absy();
  pc += AM_ABSY_BYTES;
  machine_pc_set(pc);
  rc = inst_ORA();
  break;
case 0x1a:
  /* 0x1a INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x1b:
  /* 0x1b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x1c:
  /* 0x1c INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x1d:
  /* 0x1d ABSX ORA */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_ORA();
  break;
case 0x1e:
  /* 0x1e ABSX ASL */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_ASL();
  break;
case 0x1f:
  /* 0x1f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x20:
  /* 0x20 ABS JSR */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_JSR();
  break;
case 0x21:
  /* 0x21 XIND AND */
  inst_am_xind();
  pc += AM_XIND_BYTES;
  machine_pc_set(pc);
  rc = inst_AND();
  break;
case 0x22:
  /* 0x22 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x23:
  /* 0x23 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x24:
  /* 0x24 ZP BIT */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_BIT();
  break;
case 0x25:
  /* 0x25 ZP AND */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_AND();
  break;
case 0x26:
  /* 0x26 ZP ROL */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_ROL();
  break;
case 0x27:
  /* 0x27 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x28:
  /* 0x28 IMPL PLP */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_PLP();
  break;
case 0x29:
  /* 0x29 IMM AND */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_AND();
  break;
case 0x2a:
  /* 0x2a ACC ROL */
  inst_am_acc();
  pc += AM_ACC_BYTES;
  machine_pc_set(pc);
  rc = inst_ROL();
  break;
case 0x2b:
  /* 0x2b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x2c:
  /* 0x2c ABS BIT */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_BIT();
  break;
case 0x2d:
  /* 0x2d ABS AND */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_AND();
  break;
case 0x2e:
  /* 0x2e ABS ROL */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_ROL();
  break;
case 0x2f:
  /* 0x2f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x30:
  /* 0x30 REL BMI */
  inst_am_rel();
  pc += AM_REL_BYTES;
  machine_pc_set(pc);
  rc = inst_BMI();
  break;
case 0x31:
  /* 0x31 INDY AND */
  inst_am_indy();
  pc += AM_INDY_BYTES;
  machine_pc_set(pc);
  rc = inst_AND();
  break;
case 0x32:
  /* 0x32 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x33:
  /* 0x33 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x34:
  /* 0x34 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x35:
  /* 0x35 ZPX AND */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_AND();
  break;
case 0x36:
  /* 0x36 ZPX ROL */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_ROL();
  break;
case 0x37:
  /* 0x37 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x38:
  /* 0x38 IMPL SEC */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_SEC();
  break;
case 0x39:
  /* 0x39 ABSY AND */
  inst_am_absy();
  pc += AM_ABSY_BYTES;
  machine_pc_set(pc);
  rc = inst_AND();
  break;
case 0x3a:
  /* 0x3a INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x3b:
  /* 0x3b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x3c:
  /* 0x3c INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x3d:
  /* 0x3d ABSX AND */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_AND();
  break;
case 0x3e:
  /* 0x3e ABSX ROL */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_ROL();
  break;
case 0x3f:
  /* 0x3f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x40:
  /* 0x40 IMPL RTI */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_RTI();
  break;
case 0x41:
  /* 0x41 XIND EOR */
  inst_am_xind();
  pc += AM_XIND_BYTES;
  machine_pc_set(pc);
  rc = inst_EOR();
  break;
case 0x42:
  /* 0x42 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x43:
  /* 0x43 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x44:
  /* 0x44 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x45:
  /* 0x45 ZP EOR */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_EOR();
  break;
case 0x46:
  /* 0x46 ZP LSR */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_LSR();
  break;
case 0x47:
  /* 0x47 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x48:
  /* 0x48 IMPL PHA */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_PHA();
  break;
case 0x49:
  /* 0x49 IMM EOR */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_EOR();
  break;
case 0x4a:
  /* 0x4a ACC LSR */
  inst_am_acc();
  pc += AM_ACC_BYTES;
  machine_pc_set(pc);
  rc = inst_LSR();
  break;
case 0x4b:
  /* 0x4b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x4c:
  /* 0x4c ABS JMP */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_JMP();
  break;
case 0x4d:
  /* 0x4d ABS EOR */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_EOR();
  break;
case 0x4e:
  /* 0x4e ABS LSR */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_LSR();
  break;
case 0x4f:
  /* 0x4f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x50:
  /* 0x50 REL BVC */
  inst_am_rel();
  pc += AM_REL_BYTES;
  machine_pc_set(pc);
  rc = inst_BVC();
  break;
case 0x51:
  /* 0x51 INDY EOR */
  inst_am_indy();
  pc += AM_INDY_BYTES;
  machine_pc_set(pc);
  rc = inst_EOR();
  break;
case 0x52:
  /* 0x52 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x53:
  /* 0x53 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x54:
  /* 0x54 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x55:
  /* 0x55 ZPX EOR */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_EOR();
  break;
case 0x56:
  /* 0x56 ZPX LSR */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_LSR();
  break;
case 0x57:
  /* 0x57 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x58:
  /* 0x58 IMPL CLI */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_CLI();
  break;
case 0x59:
  /* 0x59 ABSY EOR */
  inst_am_absy();
  pc += AM_ABSY_BYTES;
  machine_pc_set(pc);
  rc = inst_EOR();
  break;
case 0x5a:
  /* 0x5a INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x5b:
  /* 0x5b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x5c:
  /* 0x5c INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x5d:
  /* 0x5d ABSX EOR */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_EOR();
  break;
case 0x5e:
  /* 0x5e ABSX LSR */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_LSR();
  break;
case 0x5f:
  /* 0x5f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x60:
  /* 0x60 IMPL RTS */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_RTS();
  break;
case 0x61:
  /* 0x61 XIND ADC */
  inst_am_xind();
  pc += AM_XIND_BYTES;
  machine_pc_set(pc);
  rc = inst_ADC();
  break;
case 0x62:
  /* 0x62 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x63:
  /* 0x63 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x64:
  /* 0x64 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x65:
  /* 0x65 ZP ADC */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_ADC();
  break;
case 0x66:
  /* 0x66 ZP ROR */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_ROR();
  break;
case 0x67:
  /* 0x67 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x68:
  /* 0x68 IMPL PLA */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_PLA();
  break;
case 0x69:
  /* 0x69 IMM ADC */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_ADC();
  break;
case 0x6a:
  /* 0x6a ACC ROR */
  inst_am_acc();
  pc += AM_ACC_BYTES;
  machine_pc_set(pc);
  rc = inst_ROR();
  break;
case 0x6b:
  /* 0x6b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x6c:
  /* 0x6c IND JMP */
  inst_am_ind();
  pc += AM_IND_BYTES;
  machine_pc_set(pc);
  rc = inst_JMP();
  break;
case 0x6d:
  /* 0x6d ABS ADC */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_ADC();
  break;
case 0x6e:
  /* 0x6e ABS ROR */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_ROR();
  break;
case 0x6f:
  /* 0x6f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x70:
  /* 0x70 REL BVS */
  inst_am_rel();
  pc += AM_REL_BYTES;
  machine_pc_set(pc);
  rc = inst_BVS();
  break;
case 0x71:
  /* 0x71 INDY ADC */
  inst_am_indy();
  pc += AM_INDY_BYTES;
  machine_pc_set(pc);
  rc = inst_ADC();
  break;
case 0x72:
  /* 0x72 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x73:
  /* 0x73 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x74:
  /* 0x74 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x75:
  /* 0x75 ZPX ADC */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_ADC();
  break;
case 0x76:
  /* 0x76 ZPX ROR */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_ROR();
  break;
case 0x77:
  /* 0x77 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x78:
  /* 0x78 IMPL SEI */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_SEI();
  break;
case 0x79:
  /* 0x79 ABSY ADC */
  inst_am_absy();
  pc += AM_ABSY_BYTES;
  machine_pc_set(pc);
  rc = inst_ADC();
  break;
case 0x7a:
  /* 0x7a INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x7b:
  /* 0x7b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x7c:
  /* 0x7c INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x7d:
  /* 0x7d ABSX ADC */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_ADC();
  break;
case 0x7e:
  /* 0x7e ABSX ROR */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_ROR();
  break;
case 0x7f:
  /* 0x7f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x80:
  /* 0x80 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x81:
  /* 0x81 XIND STA */
  inst_am_xind();
  pc += AM_XIND_BYTES;
  machine_pc_set(pc);
  rc = inst_STA();
  break;
case 0x82:
  /* 0x82 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x83:
  /* 0x83 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x84:
  /* 0x84 ZP STY */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_STY();
  break;
case 0x85:
  /* 0x85 ZP STA */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_STA();
  break;
case 0x86:
  /* 0x86 ZP STX */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_STX();
  break;
case 0x87:
  /* 0x87 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x88:
  /* 0x88 IMPL DEY */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_DEY();
  break;
case 0x89:
  /* 0x89 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x8a:
  /* 0x8a IMPL TXA */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_TXA();
  break;
case 0x8b:
  /* 0x8b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x8c:
  /* 0x8c ABS STY */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_STY();
  break;
case 0x8d:
  /* 0x8d ABS STA */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_STA();
  break;
case 0x8e:
  /* 0x8e ABS STX */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_STX();
  break;
case 0x8f:
  /* 0x8f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x90:
  /* 0x90 REL BCC */
  inst_am_rel();
  pc += AM_REL_BYTES;
  machine_pc_set(pc);
  rc = inst_BCC();
  break;
case 0x91:
  /* 0x91 INDY STA */
  inst_am_indy();
  pc += AM_INDY_BYTES;
  machine_pc_set(pc);
  rc = inst_STA();
  break;
case 0x92:
  /* 0x92 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x93:
  /* 0x93 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x94:
  /* 0x94 ZPX STY */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_STY();
  break;
case 0x95:
  /* 0x95 ZPX STA */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_STA();
  break;
case 0x96:
  /* 0x96 ZPY STX */
  inst_am_zpy();
  pc += AM_ZPY_BYTES;
  machine_pc_set(pc);
  rc = inst_STX();
  break;
case 0x97:
  /* 0x97 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x98:
  /* 0x98 IMPL TYA */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_TYA();
  break;
case 0x99:
  /* 0x99 ABSY STA */
  inst_am_absy();
  pc += AM_ABSY_BYTES;
  machine_pc_set(pc);
  rc = inst_STA();
  break;
case 0x9a:
  /* 0x9a IMPL TXS */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_TXS();
  break;
case 0x9b:
  /* 0x9b INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x9c:
  /* 0x9c INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x9d:
  /* 0x9d ABSX STA */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_STA();
  break;
case 0x9e:
  /* 0x9e INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0x9f:
  /* 0x9f INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xa0:
  /* 0xa0 IMM LDY */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_LDY();
  break;
case 0xa1:
  /* 0xa1 XIND LDA */
  inst_am_xind();
  pc += AM_XIND_BYTES;
  machine_pc_set(pc);
  rc = inst_LDA();
  break;
case 0xa2:
  /* 0xa2 IMM LDX */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_LDX();
  break;
case 0xa3:
  /* 0xa3 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xa4:
  /* 0xa4 ZP LDY */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_LDY();
  break;
case 0xa5:
  /* 0xa5 ZP LDA */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_LDA();
  break;
case 0xa6:
  /* 0xa6 ZP LDX */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_LDX();
  break;
case 0xa7:
  /* 0xa7 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xa8:
  /* 0xa8 IMPL TAY */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_TAY();
  break;
case 0xa9:
  /* 0xa9 IMM LDA */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_LDA();
  break;
case 0xaa:
  /* 0xaa IMPL TAX */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_TAX();
  break;
case 0xab:
  /* 0xab INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xac:
  /* 0xac ABS LDY */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_LDY();
  break;
case 0xad:
  /* 0xad ABS LDA */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_LDA();
  break;
case 0xae:
  /* 0xae ABS LDX */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_LDX();
  break;
case 0xaf:
  /* 0xaf INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xb0:
  /* 0xb0 REL BCS */
  inst_am_rel();
  pc += AM_REL_BYTES;
  machine_pc_set(pc);
  rc = inst_BCS();
  break;
case 0xb1:
  /* 0xb1 INDY LDA */
  inst_am_indy();
  pc += AM_INDY_BYTES;
  machine_pc_set(pc);
  rc = inst_LDA();
  break;
case 0xb2:
  /* 0xb2 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xb3:
  /* 0xb3 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xb4:
  /* 0xb4 ZPX LDY */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_LDY();
  break;
case 0xb5:
  /* 0xb5 ZPX LDA */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_LDA();
  break;
case 0xb6:
  /* 0xb6 ZPY LDX */
  inst_am_zpy();
  pc += AM_ZPY_BYTES;
  machine_pc_set(pc);
  rc = inst_LDX();
  break;
case 0xb7:
  /* 0xb7 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xb8:
  /* 0xb8 IMPL CLV */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_CLV();
  break;
case 0xb9:
  /* 0xb9 ABSY LDA */
  inst_am_absy();
  pc += AM_ABSY_BYTES;
  machine_pc_set(pc);
  rc = inst_LDA();
  break;
case 0xba:
  /* 0xba IMPL TSX */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_TSX();
  break;
case 0xbb:
  /* 0xbb INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xbc:
  /* 0xbc ABSX LDY */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_LDY();
  break;
case 0xbd:
  /* 0xbd ABSX LDA */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_LDA();
  break;
case 0xbe:
  /* 0xbe ABSY LDX */
  inst_am_absy();
  pc += AM_ABSY_BYTES;
  machine_pc_set(pc);
  rc = inst_LDX();
  break;
case 0xbf:
  /* 0xbf INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xc0:
  /* 0xc0 IMM CPY */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_CPY();
  break;
case 0xc1:
  /* 0xc1 XIND CMP */
  inst_am_xind();
  pc += AM_XIND_BYTES;
  machine_pc_set(pc);
  rc = inst_CMP();
  break;
case 0xc2:
  /* 0xc2 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xc3:
  /* 0xc3 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xc4:
  /* 0xc4 ZP CPY */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_CPY();
  break;
case 0xc5:
  /* 0xc5 ZP CMP */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_CMP();
  break;
case 0xc6:
  /* 0xc6 ZP DEC */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_DEC();
  break;
case 0xc7:
  /* 0xc7 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xc8:
  /* 0xc8 IMPL INY */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_INY();
  break;
case 0xc9:
  /* 0xc9 IMM CMP */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_CMP();
  break;
case 0xca:
  /* 0xca IMPL DEX */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_DEX();
  break;
case 0xcb:
  /* 0xcb INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xcc:
  /* 0xcc ABS CPY */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_CPY();
  break;
case 0xcd:
  /* 0xcd ABS CMP */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_CMP();
  break;
case 0xce:
  /* 0xce ABS DEC */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_DEC();
  break;
case 0xcf:
  /* 0xcf INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xd0:
  /* 0xd0 REL BNE */
  inst_am_rel();
  pc += AM_REL_BYTES;
  machine_pc_set(pc);
  rc = inst_BNE();
  break;
case 0xd1:
  /* 0xd1 INDY CMP */
  inst_am_indy();
  pc += AM_INDY_BYTES;
  machine_pc_set(pc);
  rc = inst_CMP();
  break;
case 0xd2:
  /* 0xd2 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xd3:
  /* 0xd3 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xd4:
  /* 0xd4 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xd5:
  /* 0xd5 ZPX CMP */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_CMP();
  break;
case 0xd6:
  /* 0xd6 ZPX DEC */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_DEC();
  break;
case 0xd7:
  /* 0xd7 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xd8:
  /* 0xd8 IMPL CLD */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_CLD();
  break;
case 0xd9:
  /* 0xd9 ABSY CMP */
  inst_am_absy();
  pc += AM_ABSY_BYTES;
  machine_pc_set(pc);
  rc = inst_CMP();
  break;
case 0xda:
  /* 0xda INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xdb:
  /* 0xdb INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xdc:
  /* 0xdc INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xdd:
  /* 0xdd ABSX CMP */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_CMP();
  break;
case 0xde:
  /* 0xde ABSX DEC */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_DEC();
  break;
case 0xdf:
  /* 0xdf INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xe0:
  /* 0xe0 IMM CPX */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_CPX();
  break;
case 0xe1:
  /* 0xe1 XIND SBC */
  inst_am_xind();
  pc += AM_XIND_BYTES;
  machine_pc_set(pc);
  rc = inst_SBC();
  break;
case 0xe2:
  /* 0xe2 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xe3:
  /* 0xe3 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xe4:
  /* 0xe4 ZP CPX */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_CPX();
  break;
case 0xe5:
  /* 0xe5 ZP SBC */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_SBC();
  break;
case 0xe6:
  /* 0xe6 ZP INC */
  inst_am_zp();
  pc += AM_ZP_BYTES;
  machine_pc_set(pc);
  rc = inst_INC();
  break;
case 0xe7:
  /* 0xe7 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xe8:
  /* 0xe8 IMPL INX */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_INX();
  break;
case 0xe9:
  /* 0xe9 IMM SBC */
  inst_am_imm();
  pc += AM_IMM_BYTES;
  machine_pc_set(pc);
  rc = inst_SBC();
  break;
case 0xea:
  /* 0xea IMPL NOP */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_NOP();
  break;
case 0xeb:
  /* 0xeb INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xec:
  /* 0xec ABS CPX */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_CPX();
  break;
case 0xed:
  /* 0xed ABS SBC */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_SBC();
  break;
case 0xee:
  /* 0xee ABS INC */
  inst_am_abs();
  pc += AM_ABS_BYTES;
  machine_pc_set(pc);
  rc = inst_INC();
  break;
case 0xef:
  /* 0xef INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xf0:
  /* 0xf0 REL BEQ */
  inst_am_rel();
  pc += AM_REL_BYTES;
  machine_pc_set(pc);
  rc = inst_BEQ();
  break;
case 0xf1:
  /* 0xf1 INDY SBC */
  inst_am_indy();
  pc += AM_INDY_BYTES;
  machine_pc_set(pc);
  rc = inst_SBC();
  break;
case 0xf2:
  /* 0xf2 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xf3:
  /* 0xf3 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xf4:
  /* 0xf4 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xf5:
  /* 0xf5 ZPX SBC */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_SBC();
  break;
case 0xf6:
  /* 0xf6 ZPX INC */
  inst_am_zpx();
  pc += AM_ZPX_BYTES;
  machine_pc_set(pc);
  rc = inst_INC();
  break;
case 0xf7:
  /* 0xf7 INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xf8:
  /* 0xf8 IMPL SED */
  inst_am_impl();
  pc += AM_IMPL_BYTES;
  machine_pc_set(pc);
  rc = inst_SED();
  break;
case 0xf9:
  /* 0xf9 ABSY SBC */
  inst_am_absy();
  pc += AM_ABSY_BYTES;
  machine_pc_set(pc);
  rc = inst_SBC();
  break;
case 0xfa:
  /* 0xfa INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xfb:
  /* 0xfb INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xfc:
  /* 0xfc INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;
case 0xfd:
  /* 0xfd ABSX SBC */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_SBC();
  break;
case 0xfe:
  /* 0xfe ABSX INC */
  inst_am_absx();
  pc += AM_ABSX_BYTES;
  machine_pc_set(pc);
  rc = inst_INC();
  break;
case 0xff:
  /* 0xff INVALIDAM INV */
  inst_am_invalidam();
  pc += AM_INVALIDAM_BYTES;
  machine_pc_set(pc);
  rc = inst_INV();
  break;